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WFP6131AGSR january 5, 2000 1 rev. 0.02 advanced product information 9/11-channel buffer features ? 11 high drive buffers on a chip ? full spec. operation from 3.3v to 5.5v ? high output drive current: 350ma ? low supply current: 3ma (typ) ? a/b channel input per buffer ? each buffer stable with output load of up to 240nf ? 9 ouput power save mode applications ? reference buffer for svga/xga tft- lcd drive circuit. ? electronic notebooks ? electronic games ? personal communication devices ? personal digital assistants (pda) ? active filter ? multi-voltage buffering product description the WFP6131AGSR is an 11-channel buffer ampli- fier that provides a single-chip solution to the ref- erence voltage requirements of tft-lcd drivers. it can also be used in any cost sensitive application that requires large number (11 maximum) of high drive buffers in a space saving tssop package. the WFP6131AGSR has two selectable inputs per buffer allowing the selection of two reference volt- ages via one on-chip multiplexer for all 11 buffers. the WFP6131AGSR supports 9 or 11 reference voltage systems. for 9 reference applications, the 2 unused amplifiers may be disabled to reduce power dissipation. hsync vsync pclk data enable 309 gate driver 309 309 1024 x 768 gate driver p 17 -p 0 ... ....... lcd control asic graphics controller wfp6840 signal driver wfp6840 signal driver wfp6840 signal driver 262,144-color lcd wfp6131a gsr buffer control control control control data voltage references 9 or 11
2 january 5, 2000 rev. 0.02 WFP6131AGSR 11-channel buffer features & benefits features benefits ? high integration ? 11 high drive reference voltage outputs ? internal multiplexors allow polarity-dependent refer- ence values to be selected via a/b_sel input. ? low power operation ? analog supply voltage: 3.3 v 0.3 v to 5.0 v 0.5 v ? low supply headroom allows wide output dynamic range and minimizes power dissipation. ? low quiescent current of less than 0.5 ma per refer- ence output (typical). ? en_11 pin (internally pulled-down) disables out_1 & out_11 amplifiers to reduce power dissipation in 9 reference amplifier applications. may be set to logic high to enable out_1 & out_11. ? high performance amplifiers ? typical slew rate of 2v/ m s with 0.24 m f load ? typically settles to within 50 mv of final value in 6 m s with 0.24 m f load. ? drives large load capacitance ? maintains stable operation with load capacitance of 100 pf to 0.24 m f. ? die size: 2.25 x 4.5 mm ? small die size for chip-on-board applications. ? 48-pin tssop package ? tssop package reduces cost and board space.
january 5, 2000 3 rev. 0.02 WFP6131AGSR 11-channel buffer 48 pin tssop package dimensions (millimeters) figure 2-1 -b- 6.1 +/- 0.1 24 4.05 8.1 25 1 48 0.2 c b a all lead tips 1.1 max (0.90) 0.10 0.05 typ 0.17 - 0.27 typ 0.5 typ 0.1 c all lead tips -c- 0.09 - 0.20 typ see detail a gage plane 0.25 seating plane 0.60 0-8 +0.15 -0.10 detail a -a- 12.5 +/- 0.1
january 5, 2000 4 rev. 0.02 WFP6131AGSR 11-channel buffer die size and pad coordinates pad signal x y 2 i1_a -2072.7 -365.9 3 i1_b -2072.7 -563.7 4 i2_a -2072.7 -763.7 5 i2_b -1764.9 -904.2 6 i3_a -1513.1 -904.2 7 i3_b -1269.8 -904.2 8 i4_a -1062.8 -904.2 9 i4_b -846.2 -904.2 10 i5_a -631.1 -904.2 11 i5_b -372.6 -904.2 12 i6_a -122.8 -904.2 13 i6_b 127.2 -904.2 14 i7_a 377.0 -904.2 15 i7_b 635.5 -904.2 16 i8_a 850.6 -904.2 17 i8_b 1067.2 -904.2 18 i9_a 1274.2 -904.2 19 i9_b 1517.5 -904.2 20 i10_a 1769.3 -904.2 21 i10_b 2072.7 -763.7 22 i11_a 2072.7 -563.7 23 i11_b 2072.7 -365.9 26.1 out11 2069.0 250.8 26.2 out11 2069.0 377.8 29 a/b_sel 2069.0 647.5 30 v dda 1873.0 926.5 table 2-1: die pad coordinates (0,0) y x figure 2-2: WFP6131AGSR die 2.25 mm 4.5 mm 2 5 20 23 29 26 32 42 36 37 38 39 45 47 31 gnd 1736.0 926.5 32.1 out10 1323.9 562.8 32.2 out10 1196.9 562.8 33.1 out9 1046.3 562.8 33.2 out9 919.3 562.8 34.1 out8 768.7 562.8 34.2 out8 641.7 562.8 35.1 out7 491.1 562.8 35.2 out7 364.1 562.8 36.1 out6 213.5 562.8 36.2 out6 86.5 562.8 37 gnd -70.3 562.8 38 v dda -207.3 562.8 39.1 out5 -364.1 562.8 39.2 out5 -491.1 562.8 40.1 out4 -641.7 562.8 40.2 out4 -768.7 562.8 41.1 out3 -919.3 562.8 41.2 out3 -1046.3 562.8 42.1 out2 -1196.9 562.8 42.2 out2 -1323.9 562.8 43 gnd -1736.0 926.5 44 v dda -1873.0 926.5 45 en_11 -2069.0 647.5 47.1 out1 -2069.0 377.8 47.2 out1 -2069.0 250.8 pad signal x y table 2-1: die pad coordinates
january 5, 2000 5 rev. 0.02 WFP6131AGSR 11-channel buffer function & pin information + - . + - . + - . + - . + - . + - . + - . + - . + - . + - . + - . out_1 out_2 out_3 out_4 out_5 out_6 out_7 out_8 out_9 out_10 out_11 mux mux mux mux mux mux mux mux mux mux mux i1_a i1_b i2_a i2_b i3_a i3_b i4_a i4_b i5_a i5_b i6_a i6_b i7_a i7_b i8_a i8_b i9_a i9_b i10_a i10_b i11_a i11_b a/b_sel v dda 29 44,38,30 43,37,31 47 42 41 40 39 36 35 34 33 32 26 24 23 20 21 18 19 16 17 14 15 12 13 10 11 8 9 6 7 4 5 2 3 figure 3-1 gnd table 3C1 mux function a/b_sel out_x logic low ix_b logic high ix_a en_11 45 table 3C2 en_11 function en_11 outputs enabled logic low or n.c. out_2..out_10 logic high out_1..out_11
6 january 5, 2000 rev. 0.02 WFP6131AGSR 11-channel buffer application information + - . + - . + - . + - . + - . + - . + - . + - . + - . + - . + - . no connect out_2 out_3 out_4 out_5 out_6 out_7 out_8 out_9 out_10 no connect mux mux mux mux mux mux mux mux mux mux mux i1_a i1_b i2_a i2_b i3_a i3_b i4_a i4_b i5_a i5_b i6_a i6_b i7_a i7_b i8_a i8_b i9_a i9_b i10_a i10_b i11_a i11_b a/b_sel v dda 29 44,38,30 43,37,31 47 42 41 40 39 36 35 34 33 32 26 24 23 20 21 18 19 16 17 14 15 12 13 10 11 8 9 6 7 4 5 2 3 gnd 45 no connect + - . + - . + - . + - . + - . + - . + - . + - . + - . + - . + - . out_1 out_2 out_3 out_4 out_5 out_6 out_7 out_8 out_9 out_10 out_11 mux mux mux mux mux mux mux mux mux mux mux i1_a i1_b i2_a i2_b i3_a i3_b i4_a i4_b i5_a i5_b i6_a i6_b i7_a i7_b i8_a i8_b i9_a i9_b i10_a i10_b i11_a i11_b a/b_sel v dda 29 44,38,30 43,37,31 47 42 41 40 39 36 35 34 33 32 26 24 23 20 21 18 19 16 17 14 15 12 13 10 11 8 9 6 7 4 5 2 3 gnd 45 figure 3-3: 11 references figure 3-2: 9 references (out_1 & out_11 disabled) 3.3 uf 0.1 uf + 3.3 uf 0.1 uf + en_11 en_11
january 5, 2000 7 rev. 0.02 WFP6131AGSR 11-channel buffer specifications 0.1 absolute maximum ratings symbol parameter min max units notes vin input voltage -0.3 v dda + 0.3 volts 1 v dda supply voltage -0.3 6.0 volts 1 i l injection current -100 100 ma t j junction temperature 150 c t a operating temperature -20 85 c 2 t stg storage temperature -30 85 c operation at or beyond these limits may result in permanent damage to the device. normal operation is not guaranteed at these extremes. notes : 1) voltages are with respect to ground (gnd). 2) ambient temperature under bias . 0.2 recommended operating conditions (preliminary data C subject to change) symbol parameter min typical max units notes v dda analog supply voltage 3.0 5.5 volts 1 t a ambient air temperature 0 25 70 c c l output load capacitance 0.3 m f notes: 1) voltages are with respect to gnd.
8 january 5, 2000 rev. 0.02 WFP6131AGSR 11-channel buffer 0.3. dc characteristics (preliminary data C subject to change) v dda = 5.0 v, t a = 25 c. all voltages are with respect to gnd. symbol parameter min typ max units test conditions note a v large signal gain 0.985 1.0 1.015 v/v fig. 4-1 1 v io input offset voltage 20 mv fig. 4-1 1 v 01 output voltage range 0.2 4.8 v fig. 4-1 2 i sc output short circuit current 0.5 a fig. 4-3 3 i vdda analog power supply current 3 6 ma en_11 high v ih input logic high 3.6 v 4,5 v il input logic low 0.8 v 4 i in input leakage current -5.0 5.0 m a0 < v in < v dda 6 i en_11 input current on en_11 (high) 50 m av in = v dda 7 notes : 1) r l = open and v x = 0.0 v; r s = 2 w ; c l = 0.24 uf, out_n = 2.5v 2) -75 ma < i outdc < 75 ma. applies to out_1 .. out_11 3) out_n = 2.5v. 4) applies to a/b_sel and en_11 input pins. 5) for vdda = 4.5v, v ih min = 2.8v. 6) applies to all input pins except en_11 in high state. 7) applies to en_11 pin when v in on en_11 pin = v dda 0.4. ac characteristics (preliminary data C subject to change) v dda = 5.0 v, t a = 25 c. all voltages are with respect to gnd. symbol parameter min typ max units test conditions note t set settling time 8.0 m sec fig. 4-2 1 sr+,sr- pos. & neg. slew rate 0.8 v/ m sec fig. 4-2 1,2 notes :1) r l /r s < 5, -75 ma < i outdc < 75 ma. c l = 0.24 m f. measured for a 4.4v step settling to within 50 mv of final value. applies to out_1 .. out_11 2) slew rate measured between 20% and 80% points of step.
january 5, 2000 9 rev. 0.02 WFP6131AGSR 11-channel buffer 0.5. dc characteristics (preliminary data C subject to change) v dda = 3.3 v, t a = 25 c. all voltages are with respect to gnd. symbol parameter min typ max units test conditions note a v large signal gain 0.975 1.0 1.025 v/v fig. 4-1 1 v io input offset voltage 30 mv fig. 4-1 1 v 01 output voltage 0.2 3.1 v fig. 4-1 2 i sc output short circuit current 0.33 a fig. 4-3 3 i vdda analog power supply current 3 5 ma en_11 high v ih input logic high 2.0 v 4 v il input logic low 0.8 v 4 i in input leakage current -5.0 5.0 m a0 < v in < v dda 5 i en_11 input current on en_11 (high) 33 m av in = v dda 6 notes :1) r l = open and v x = 0.0 v; r s = 2 w ; c l = 0.24 uf, out_n = 1.65 v 2) -50 ma < i outdc < 50 ma. applies to out_1 ...out_11 3) out_n = 1.65 v 4) applies to a/b_sel and en_11 input pins 5) applies to all input pins except en_11 in high state 6) applies to en_11 pin when v in on en_11 pin = v dda 0.6. ac characteristics (preliminary data C subject to change) v dda = 3.3 v, t a = 25 c. all voltages are with respect to gnd. symbol parameter min typ max units test conditions note t set settling time 8.0 m sec fig. 4-2 1 sr+, sr- pos. & neg. slew rate 0.6 v/ m sec fig. 4-2 1 notes :1) r l /r s < 5, -50 ma < i outdc < 50 ma. c l = 0.24 m f. measured for a 2.6v step settling to within 30 mv of final value. applies to out_1 .. out_11 2) slew rate measured between 20% and 80% points of step.
10 january 5, 2000 rev. 0.02 WFP6131AGSR 11-channel buffer . + - i outdc r l v x dut out_n adjust v x to achieve desired i outdc where v x = out_n - i outdc *r l figure 4-1 + - i outdc r l c l v x dut r s out_n adjust v x to achieve desired i outdc where v x = out_n - i outdc *r l figure 4-2 + v x out_n dut set v x = 2.5 v measure i sc - i sc vary vref full scale (rail-to-rail). figure 4-3
january 5, 2000 11 rev. 0.02 WFP6131AGSR 11-channel buffer package top marking guide for product assembled after 12/31/99 for product assembled before 12/31/99 WFP6131AGSR part number package type r : tssop xxxxxxxxxxxi winbond flat panel line 1 line 2 ywwkpll line 3 assembly year assembly work week subcontractor code product revision number product number code lot number id cl-fp6131ags part number package type gs : 48 tssop cirrus logic flat panel

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